There is growing acceptance of techniques that leverage networked connectivity for extending and centralizing the resources of host computer systems. In particular, networked connectivity is being widely utilized for specialized applications such as attaching storage to computers. iSCSI makes use of TCP/IP as a transport for the SCSI parallel bus to enable low cost remote centralization of storage. The problem with iSCSI is it has a relatively narrow (storage) focus and capability.
Another trend is the move towards definition and virtualization of multiple computing machines within one host system. Virtualization is particularly well suited for blade server installations where the architecture is optimized for high density compute resources and pooled storage. The virtualization of CPU cycles, memory resources, storage, and network bandwidth allows for unprecedented mobility, flexibility, and adaptability of computing tasks.
PCI Express, as the successor to PCI bus, has moved to the forefront as the predominant local host bus for computer system motherboard architectures. A cabled version of PCI Express allows for high performance directly attached bus expansion via docks or expansion chassis. These docks and expansion chassis may be populated with any of the myriad of widely available PCI Express or PCl/PCI-X bus adapter cards. The adapter cards may be storage oriented (i.e. Fibre Channel, SCSI), video processing, audio processing, or any number of application specific Input/Output (I/O) functions. A limitation of PCI Express is that it is limited to direct attach expansion. A problem with certain blade server architectures is PCI Express is not easily accessible, thus expansion is awkward, difficult, or costly.
Gbps Ethernet is beginning to give way to 10 Gbps Ethernet. This significant increase in bandwidth enables unprecedented high performance applications via networks.
A hardware/software system and method that collectively enables virtualization of the host bus computer's native I/O system architecture via the Internet, LANs, WANs, and WPANs is disclosed in U.S. patent application Ser. No. 12/148,712, the teachings of which are incorporated herein by reference. The system described, designated “i-PCI”, achieves technical advantages as a hardware/software system and method that collectively enables virtualization of the host computer's native I/O system architecture via the Internet, LANs, WANs, and WPANs. The system includes a solution to the problems of the relatively narrow focus of iSCSI, the direct connect limitation of PCI Express, and the inaccessibility of PCI Express for expansion in blade architectures.
Referring to FIG. 1, this system allows devices native to the host computer native I/O system architecture—including bridges, I/O controllers, and a large variety of general purpose and specialty I/O cards—to be located remotely from the host computer, yet appear to the host system and host system software as native system memory or I/O address mapped resources. The end result is a host computer system with unprecedented reach and flexibility through utilization of LANs, WANs, WPAN as and the Internet.
A drawback to this type of extended system is it introduces unprecedented complexity in the native system “data path”. The data path in this context refers to the collective aggregation of links, bridges, switches, controllers, buffers, etc.—essentially the entire transit route of a data object from the data generating application to the data consuming endpoint device.
In an extended system the large number of resource configuration options and data path packetization options can lead to bottlenecks in the data transfer path if the path is not considered as a whole and then optimized at multiple levels for maximum data transfer performance. FIG. 2 shows the native system data transfer path of non-extended computer system. FIG. 3 shows the much greater complexity of the native system data transfer path of an extended computer system as a comparison.
Existing approaches are inadequate for extended systems, where a host computer's native system bus has been extended via high speed data networking protocols. Existing approaches involve simple link-by-link, component-by-component configuration, with configurations typically left to default settings. Existing approaches do not address optimization of the data path considered in its entirety. Data path optimization—if it is in fact attempted at all—is typically accomplished by the user via manual trial and error through writing various values to data path component configuration registers. In actual applications, a user must consider more than just the individual components and data links. The data transfer rate through any one link is influenced to some degree by each of the other links in the data path chain. Essentially, no two system data transfer chains are exactly the same. Thus, there can be a wide variation from system to system.
Performance through a given data path may be influenced by the interaction between the chipset-specific implementation of PCI/PCI Express data transfer commands; motherboard architecture; FIFO depth of bridges, controllers, and peripherals; data traffic patterns generated by a given combination of peripherals; peripheral-specific response to data transfer commands; the ability of bridges, controllers and peripherals to support burst commands and maximum and minimum supported packet sizes; the degree of standards compliancy of each data path component, and finally, the data traffic patterns generated by host software applications themselves. Unless the user is extremely computer literate and able to grasp all the complexities of a dynamic data path, the likelihood of achieving optimal performance is small. This problem is magnified in extended systems involving virtualized I/O.